1. Field of the Invention
The present invention relates to printed circuit board devices for use with a variety of electronic apparatuses and more particularly, a surface-mount printed circuit board device carrying bar-like connectors each disposed between a pair of lands on a printed circuit board for electrical conduction.
2. Description of the Prior Art
It is known that advanced surface-mount technologies (SMT) are widely employed for achievement of high density circuitry arrangements. Each electronic chip-on-board (COB) or chip component having electrode terminals provided at both ends of its package is soldered onto a printed circuit board. This is different compared with a conventional lead-through mounting method utilizing electronic components with lead wires extending from their packages for connecting and mounting. As shown in FIG. 7, SMT may use chip resistors of lower resistance, in place of jumpers in the conventional lead-through mounting method, for electrical conduction between two lands on a printed circuit board. There is, for example, a chip resistor 6 having two electrodes 4 and 5 provided at both ends thereof and soldered to and between a pair of lands 2 and 3 of a printed circuit board 1. This is accomplished by placing the chip resistor 6 on the lands 2 and 3 on which amounts of solder paste are applied (e.g. by screen printing process), melting the solder paste using a reflowing process, and solidifying the solder by cooling so that the two electrodes 4 and 5 are soldered to the two lands 2 and 3 respectively. Also, a circuit pattern 7 extends between the two lands 2 and 3 or the two electrodes 4 and 5. Two portions 8 and 9 of the solder paste are applied to bond the two electrodes 4 and 5 of the chip resistor 6 to the lands 2 and 3 respectively.
While the chip resistor 6 is adapted to electrically conduct between the lands 2 and 3 on the printed circuit board 1 carrying the circuit pattern 7 (which is not finished at the surface with resist coating), its package between the two electrodes 4 and 5 is electrically insulated thus producing no short-circuit. However, the chip resistor 6 of this type is more costly than common jumpers. Also, the reflowing process is likely to create a Manhattan phenomenon (illustrated in FIG. 8) in which the chip resistor 6 is lifted up when the solder paste at one of the lands 2 and 3, herein 8 as illustrated, swells upon being heated and seizes the end surface 4a of the electrode 4 of the chip resistor 6. This causes a surface tension which draws the end surface 4a towards the land 2. Consequently, electrode 5 of the chip resistor 6 disconnects from the land 3, thus interrupting the electrical connection. Thus, after the reflowing process of the SMT, it is desirable for a printed circuit board device to be subjected to an appearance test and/or in-circuit test to verify the integrity of all electrical conductions. This results in an increase of the production cost as fault conducting components have to be identified and respectively corrected by workers.
A proposed method of eliminating Manhattan phenomenon is disclosed in Japanese Patent Application Open-laying No. Hei4-283990 which is incorporated herein by reference. According to the proposed method, the width of a land on a printed circuit board is made smaller than that of the electrodes of a chip component to be mounted. As a smaller amount of solder paste is used, seizure of the entire end surface of the electrode is minimized, thus eliminating Manhattan phenomenon. However, the method still utilizes highly priced chip components with two electrodes at both sides and may not reduce the overall production cost to an appreciable level.